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september 2012 doc id 023315 rev 1 1/41 AN4130 application note steval-ill045v1: 120 v a19 dimmable high power factor 9 w led driver using the hvled815pf by thomas stamm introduction the steval-ill045v1 demonstration board showcases st's new hvled815pf led driver chip. it solves the problem of low-cost drive circuitry for led replacements for 40 w incandescent or equivalent compact-fluorescent lamps. the hvled815pf is a new integrated power controller using primary-side control to achieve led current regulation within +/-5%. (it also has primary-side voltage regulation, used here for open load protection.) the device incorporates an 800 v avalanche-rated fet and fits in a standard so-16 package. an internal startup circuit eliminates the need for external rapid-start circuitry. the pfc-flyback power converter operates in transition mode for highest efficiency and best use of components. with the addition of a few extra components the hvled815pf draws near-sinusoidal input current from the ac line. the circuit regulates led current over a wide range of line voltage and led string voltage, and is dimmable with standard triac-based dimmers. figure 1. images top and bottom www.st.com
contents AN4130 2/41 doc id 023315 rev 1 contents 1 features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 theory of operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.1 transition-mode flyback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2.2 pfc-flyback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 non-isolated flyback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.4 primary-side control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.5 using the hvled815pf current limit for power factor correction . . . . . . . 8 2.5.1 average current regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 2.5.2 adding an ac component to the current regulator . . . . . . . . . . . . . . . . . . 8 2.6 diode clamp to limit input current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.7 diode clamp effects on dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 3 power converter performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.1 led current vs. line voltage and load voltage . . . . . . . . . . . . . . . . . . . . . 14 3.2 efficiency and power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 3.3 power factor and total harmonic distortion . . . . . . . . . . . . . . . . . . . . . . . . 15 3.4 dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.5 conducted emi . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.6 startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 3.7 component stress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.7.1 thermal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 3.7.2 electrical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 3.8 summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4 design guidance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.1 the load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.2 preload resistor (r9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.3 output filter capacitor (c11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.3.1 led ripple current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.3.2 allowable ripple current in leds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.4 diode selection (d3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
AN4130 contents doc id 023315 rev 1 3/41 4.4.1 speed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.4.2 reverse voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.4.3 current rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.5 snubber capacitor selection (c10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.6 transformer design (t1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.6.1 operating frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4.6.2 primary inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.6.3 primary peak current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.6.4 reflected voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.6.5 leakage inductance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.6.6 auxiliary winding turns ratio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.6.7 final transformer specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 4.7 dmg pin (r6, r7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.8 filter capacitor for vcc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 4.9 comp pin capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.10 current sense resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.11 ac injection divider (r3, r4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 4.12 emi filter design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 4.12.1 supporting the flyback input current . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.12.2 shunting the hf noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.12.3 limiting the noise current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 4.13 emi filter and dimming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 4.13.1 damping the input filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5 bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 6 transformer specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 7 extensions and modifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 7.1 lower output voltage, higher current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 7.2 higher line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 8 pc layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 9 references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
list of figures AN4130 4/41 doc id 023315 rev 1 list of figures figure 1. images top and bottom . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. physical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 3. fet drain voltage waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. distortion of input current with sinewave reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 5. current distortion with sinewave input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 6. voltage and current waveforms with ac injection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 7. waveforms with 90 v input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 8. waveforms with 110 v input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 9. waveforms with 130 v input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 10. power loss vs. sinusoidal input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 11. output current vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 12. thd vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 13. 70 vrms input, no diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 14. bat48, ~0.3 v drop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 15. 40 vrms dimmed input, no diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 16. 40 vrms dimmed input, bat48 diode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 17. power loss vs. dimmed rms line voltage (120 v line) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 18. output current vs. dimmed rms line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 19. led current vs. line voltage with 18 series led load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 20. led current vs. led voltage at 120 v in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 figure 21. efficiency vs. line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 22. power loss vs. line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 23. power factor vs. line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 24. thd vs. line voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 25. relative dimmed output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 26. conducted emi, line 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 27. conducted emi, line 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 28. unit startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 29. component electrical stress . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 30. schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 31. led dynamic resistance vs. current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 32. simplified lisn diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 33. conducted emi limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 34. flyback converter input current waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 35. undamped input filter waveforms with triac dimmer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 36. properly damped waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 37. final input filter design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 38. input transient at 200 ma/div, 2.5 ms/div . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 39. input transient at 500 ma/div, 500 s/div . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 40. input transient at 1 a/div, 50 s/div. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 41. transformer specification for 18-led load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 figure 42. transformer specification for 9-led load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 figure 43. top placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 figure 44. top copper . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 figure 45. bottom placement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 figure 46. bottom layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
AN4130 features doc id 023315 rev 1 5/41 1 features the demonstration board features are: +/- 5% primary-side current regulation, no optocoupler low component count - 25 parts, including the emi filter only 1 tight-tolerance component high efficiency, >86% high power factor >0.98 and low thd, <20% over 90 v to 132 v range fits in 28 mm tubing, 52 mm overall length 9 w output, for light equal to 40-60 w incandescent dimmable with common triac dimmer. figure 2. physical
theory of operation AN4130 6/41 doc id 023315 rev 1 2 theory of operation 2.1 transition-mode flyback flyback power converters operate by storing energy from the primary side in an inductor's air gap, and discharging the energy into a load on the secondary side. the converter can run in two modes: 1. discontinuous conduction, where there is a deadtime between discharge and charge cycles. 2. continuous conduction, where the discharge cycle is ended by starting the charge cycle before all the stored energy is delivered to the load. neither mode fully utilizes the magnetic structure of the inductor. however, if the recharge cycle is started just after the discharge cycle ends, the natural ringing of the inductor and stray capacitance can be used to reduce turn-on voltage stress on the switch. transition mode converters can be very efficient as a result, having greatly reduced turn-on loss - the switch does not have to discharge its own and stray capacitance from a high voltage. figure 3. fet drain voltage waveforms operating frequency is a function of source and load voltages, and load current. if the source voltage varies, the operating frequency varies. this makes the transition mode converter very popular in low-cost commercial applications, where the varying frequency, due to input voltage ripple, spreads noise over a wide spectrum, reducing the noise at any one frequency. conducted emi tests can be easier to pass.
AN4130 theory of operation doc id 023315 rev 1 7/41 2.2 pfc-flyback in the pfc-flyback converter the input voltage is the rectified line voltage, with almost no filtering. converter input voltage goes to zero when the line voltage crosses zero. it's common practice to use the rectified line voltage as a reference for the peak current in the flyback converter switch. this does not result in sinusoidal input current, but it's close enough. the duty cycle change with input voltage still distorts the waveform. this is discussed in detail in st's an1059 application note. figure 4. distortion of input current with sinewave reference 2.3 non-isolated flyback in this circuit the transformer secondary shares part of the primary winding. the lack of isolation means that the burden of electrical safety rests on the led thermal mounting. the leds must be isolated from human contact. electrical stress on the power conversion components is lower than a corresponding isolated flyback converter. leakage inductance in the transformer is lower, because the secondary occupies the same space as part of the primary, and the remaining primary is very close to the secondary - interwinding insulation is not required. reduced leakage inductance results in less overshoot in the fet drain voltage, so a lower voltage fet can be used safely. the hveld815pf used here has an 800 v fet - too much for the us 120 v application but ideal for european line voltage. 2.4 primary-side control a pfc-flyback converter usually uses a pfc controller chip such as st's l6562at with an external fet and a feedback loop. the secondary side voltage and/or current are monitored, compared to a reference on the secondary side, and a control signal sent to the primary side with an opto-isolator. this signal is multiplied by a reference waveform (the rectified line voltage) and used to control peak switch current. st has developed a primary-side control circuit that eliminates the need for the secondary- side components. voltage is monitored on the housekeeping winding at the end of the flyback converter discharge cycle, just as the secondary current reaches zero. secondary current is set by measuring duty cycle and adjusting peak primary current, to provide a calculated secondary average current. but the circuit cannot work with a multiplier, so another method of shaping the peak switch current waveform must be found. 2ectifiedlinevoltage #o rrespondinginputcurrent !-v
theory of operation AN4130 8/41 doc id 023315 rev 1 2.5 using the hvled815pf current limit for power factor correction 2.5.1 average current regulation the hvled815pf does an excellent job of regulating output current in a dc input flyback supply. it calculates the peak current at which to shut off the driving fet by continuously looking at the duty cycle. the error between desired duty cycle and actual duty cycle appears as a current on the iled pin - a capacitor on this pin integrates the error to zero over time. since the voltage on this pin, divided by 2, directly sets the current at which the fet switch turns off, the output current is regulated. in dc-input flyback power supplies very small capacitors are used on the iled pin for quick response to changing loads or input voltage. the capacitor on this pin can be much larger if the load voltage does not change rapidly. led current can be regulated more slowly, averaging out the error over several cycles of input voltage. a 4.7 f low-voltage ceramic capacitor is used here. the average led current is kept constant even if the input voltage waveform is grossly distorted, such as a rectified sinewave, as occurs in the pfc-flyback topology. the input current waveform, however, is truly ugly. note the magenta trace in the figure below. figure 5. current distortion with sinewave input where: yellow = line voltage magenta = line current. the peak fet shut-off current remains at the same level throughout the ac half cycle, but the duty cycle of the converter changes. (fet on-time increases at lower input voltage - it takes longer to reach the same current if the converter input voltage is lower). the resulting input current waveform is very rich in harmonics (thd is in the range of 130%), though power factor is actually pretty good. 2.5.2 adding an ac component to the current regulator if an ac signal is injected into the iled pin, the instantaneous fet peak current can be controlled, while the average output current (a dc level) remains regulated. the figure below shows the injection of a small fraction of the line voltage into the bottom of the iled capacitor. the change in the input current waveform is dramatic. but it is best for only one
AN4130 theory of operation doc id 023315 rev 1 9/41 line voltage, and is a compromise for all others. but it's ?good enough?. the small capacitor across the lower resistor is only there to keep switching noise out of the circuit. figure 6. voltage and current waveforms with ac injection the current waveform at the ?nominal line? above actually has the lowest harmonic content due to the input current distortion inherent in the pfc-flyback converter. the hvled815pf clamps the voltage on the iled pin between about 0.2 v on the low end, and at about 1.5 v on the high end. if the injected waveform wants to swing below 0.2 v, the peak current in the fet is set to zero, so no input current flows. the scope images in figure 7 , 8 , and 9 show how well the ac injection works. :ero $#levelneeded tode liver u& n& + + !ppx6 ,ow,ine .ominal,ine (igh,ine ),%$ 0). !ppx6 6ery,ow,ine 2ectified,ine :ero :ero :ero !ppx6 !ppx6 3inewave2eference )nput#urren t correctloadcurrent (6,%$0& !-v figure 7. waveforms with 90 v input figure 8. waveforms with 110 v input trace colors: yellow = line voltage magenta = line current, 50 ma/div ref -3div blue = voltage at i led pin, ref -3 div green = led current, 50 ma/div ref -3div trace colors: yellow = line voltage magenta = line current, 50 ma/div ref -3div blue = voltage at i led pin, ref -3 div green = led current, 50 ma/div ref -3div
theory of operation AN4130 10/41 doc id 023315 rev 1 figure 9. waveforms with 130 v input where: yellow = line voltage magenta = line current, 50 ma/div ref -3div blue = voltage at i led pin, ref -3 div green = led current, 50 ma/div ref -3div. power factor is excellent over the designed line voltage range of 90 v to 132 v, well above 0.98. total harmonic distortion reaches a minimum at one line voltage. over the range, thd is less than 20%. 2.6 diode clamp to limit input current since the peak fet current is directly controlled by the voltage on the iled pin, a diode clamp can be added to limit the voltage increase to reasonable levels. the graph below shows the results for two conditions - no diode, and a schottky diode having about 0.3 v forward drop, placed across the dc filter capacitor. the hvled815 attempts to provide regulated power even if low line voltage makes that task difficult. it raises the voltage on the iled pin to fairly high levels if the line voltage is reduced. losses in the unit rise dramatically with decreasing line voltage as the input current increases.
AN4130 theory of operation doc id 023315 rev 1 11/41 figure 10. power loss vs. sinusoidal input voltage the input current increase can now be limited to a reasonable value. there are two consequences of this addition: line regulation is lost at low input voltages (the iled pin cannot rise to regulate current). figure 11. output current vs. input voltage harmonic distortion is greatly reduced at low line voltage. figure 12. thd vs. input voltage !-v x) q) . . ,/(' 3,1 5hfwlilhg/lqh +9/('3) ',2'( 0ower,oss7atts )nput62-3 .o$iode "!4 !-v ,%$#urrentm! )nput6rms .o $iode "!4 !-v 4otal (armonic$istortion )nput6rms .o$iode "!4
theory of operation AN4130 12/41 doc id 023315 rev 1 the scope shots below show the result on the input current waveform. where: yellow = line voltage magenta = line current, 50 ma/div ref -3div blue = voltage at i led pin, ref -3 div green = voltage at bottom of 4.7 f cap on i led pin. 2.7 diode clamp effects on dimming the diode-improved waveform also helps when the circuit is dimmed with a triac, especially at low conduction angles. the iled pin voltage is not allowed to rise. note how high the iled pin voltage (green trace) has risen in the first image, compared to the second, as the chip attempts to regulate the average output current. the voltage on that pin directly controls the peak fet current. figure 13. 70 vrms input, no diode figure 14. bat48, ~0.3 v drop figure 15. 40 vrms dimmed input, no diode figure 16. 40 vrms dimmed input, bat48 diode
AN4130 theory of operation doc id 023315 rev 1 13/41 where: yellow = line voltage magenta = line current, 50 ma/div ref -3div blue = voltage at i led pin, ref -3 div green = voltage at bottom of 4.7 f cap on i led pin. dissipated power is also reduced at low conduction angles due to the lower rms input current: figure 17. power loss vs. dimmed rms line voltage (120 v line) figure 18. output current vs. dimmed rms line note that the dimming curve for the schottky diode unit is much smoother and slightly lower at the low end. this allows the unit to meet the requirements of nema ssl 6-2010, as shown in figure 25 . !-v 0ower,oss7atts $immed2-3linevoltage .o$iode "!4 !-v ,%$current $immed2-3linevoltage .odiode "!4
power converter performance AN4130 14/41 doc id 023315 rev 1 3 power converter performance 3.1 led current vs. line voltage and load voltage nominal (18 leds) voltage is 54-56 v. performance is excellent over a very wide range of load conditions, even with the ac injection. 3.2 efficiency and power dissipation as expected, efficiency drops off at low voltage. the rather high r ds(on) of the hvled815pf and the input filter series resistances increase i 2 r loss due to higher required input current. figure 19. led current vs. line voltage with 18 series led load figure 20. led current vs. led voltage at 120 v in !-v ,%$#urrent!mps ,inevoltage !-v ,%$ #urrent ,%$ voltage figure 21. efficiency vs. line voltage figure 22. power loss vs. line voltage !-v %fficiency ,inevoltage !-v 0ower,oss7at ts ,inevoltage
AN4130 power converter performance doc id 023315 rev 1 15/41 3.3 power factor and total harmonic distortion 3.4 dimming figure 25. relative dimmed output figure 23. power factor vs. line voltage figure 24. thd vs. line voltage !-v ,ine voltage !-v ,inevoltage !-v 2elative light output 4riac $immed 2-3 ,ine 6oltage .ema33, limits )ncandescent relative output .ormalized ,%$ current
power converter performance AN4130 16/41 doc id 023315 rev 1 3.5 conducted emi the conducted emissions plot for the two input lines are virtually identical. the plots are the maximum (peak hold) of 10 scans for peak power. 3.6 startup figure 28. unit startup where: yellow = (not shown) line voltage, triggers scope magenta = line current blue = led voltage green = led current. the unit produces usable light in about 0.15 seconds, and nearly full output in about 0.5 seconds. figure 26. conducted emi, line 1 figure 27. conducted emi, line 2
AN4130 power converter performance doc id 023315 rev 1 17/41 3.7 component stress 3.7.1 thermal the unit was mounted above the bench in free air with the narrow end (ac input) down. temperatures were recorded after 45 minutes of operation. the dimmed temperatures were taken with a triac dimmer feeding the unit. the dimmer was adjusted to the point where the power analyzer reported greatest loss. undimmed input voltage was 120 vrms. dimmed input voltage was 108 vrms, and conduction angle about 150 degrees. table 1. component thermal stress thermal stress undimmed dimmed efficiency 87.6% 85.7% power loss 1.41 w 1.56 w ambient 23.9c 24.9c r1 36.7c 50.3c r2 50.8c 73.2c br1 46.6c 50.6c l2 42.1c 46.6c u1 66.5c 78.1c t1 56.3c 60.2c d3 56.2c 58.7c c11 41.9c 43.8c
power converter performance AN4130 18/41 doc id 023315 rev 1 3.7.2 electrical the plot below was taken near the peak of line voltage, where both voltage and current stresses are greatest. figure 29. component electrical stress where: yellow = drain voltage magenta = diode voltage blue = drain current. note the very small overshoot in the drain voltage and diode voltage waveforms. this is due to the transformer's low leakage inductance, about 0.6 microhenries. the current ringing is due to the snubber capacitor on the secondary side resonating with the leakage inductance at fet turn-on and turn-off. the circulating current loop on the pc board is very small and is only weakly coupled to the ac line, so it does not cause an emi problem. 3.8 summary performance is excellent for an led driver of this size and simplicity. the added bonuses of dimmability and power factor correction compel consideration of this design.
AN4130 power converter performance doc id 023315 rev 1 19/41 figure 30. schematic !-v 32# ),%$ $-' #/-0 .! $rain $rain #3 6cc '.$ $rain $rain .! .# .! .! 5 (6,%$0& 2 + 2 + 2 2 ,%$ ,% $7(4 ,%$ ,% $7(4 !average !ppx6 !# 6 !# 6 "2 "2)$'%3-4 # n& 3eenote 2 /hm&usible 7 7 7 7 4 $ -- 3$ 4 #ramer#3-64 6refl 6refl6 ,prim(y # u &6 $ 344(! # u&6 0r icom 0ri6 $rain 6c c aux 3ource # n& 2 + 2 + $ "!4:&),- # u&6 2 7 # u &6 # u&6 2 + $- ' comp ),%$ acinj /utpos , m(y # u&6 )rms6! )rms6! )pk02) ! . . 2 + # p& .o te 4hiscircuitcanbeusedwithother,%$quantities &or,%$satm! 4#ramer#3-64 outputtapatofprimary #p&6#/' $3403(! #u&6 2 + %xample .ote4hefusibleresistor2 inthebillofmaterialsis knowntoholdondimmingatdegreesconduction 4estsubstitutescarefully
design guidance AN4130 20/41 doc id 023315 rev 1 4 design guidance this section, like any power design, proceeds from output to input. please refer to the schematic on the previous page. 4.1 the load the converter design is optimized for a string of 18 leds, about 54 vdc at a current of 175 ma. 4.2 preload resistor (r9) while the unit's dimmed output current lies inside the nema limits, performance can be improved by adding a light preload. this reduces efficiency, but the unit's operation is much more stable at low conduction angles. the reason is that most dimmers rely on line voltage to set the triac firing delay after the zero crossing. at low conduction angles the delay is strongly dependent on line voltage. the slightest variation is visible, because the led light output reacts very quickly to current changes, much more quickly than do incandescent lamps, where the filament is a thermal reservoir that slows the lamp?s response to changes in the dimmed rms input voltage. the preload resistor is also required for the open-load protection to work. without it, the output voltage climbs until the leakage current in the output filter capacitor limits it. this causes no short-term damage, but should be avoided. 4.3 output filter capacitor (c11) 4.3.1 led ripple current leds require more filtering than normal loads. leds are diodes, and their impedance is a function of the current through them. typically, an led has a dynamic impedance, or slope resistance, of about 1/10 of the ratio of dc voltage to dc current.
AN4130 design guidance doc id 023315 rev 1 21/41 figure 31. led dynamic resistance vs. current for a small voltage change the current change is about 10 times as large as for a resistive load. a 1 w white led (~3.2 v at ~350 ma) has a slope resistance of about 1 at full power. as the current is reduced, the led impedance rises accordingly, inversely proportional to the current. but the capacitor's impedance determines the ripple voltage - the led current ripple percentage does not increase as the unit is dimmed. 4.3.2 allowable ripple current in leds at the converter switching frequency the output filter capacitor takes almost all the ripple current. the esr of the capacitor is dominant at that frequency, and is orders of magnitude lower than the led impedance. high frequency ripple in the leds is not a concern. at twice the line frequency (120 hz) led ripple can have an effect on people even if it can't be directly observed. it's common practice in the lighting industry to limit the optical ripple to about 10% rms of the total light, and nema ssl6-2010 requires a statement of ripple percentage on the packaging if this is exceeded. so led current ripple must be kept below 10%. at 120 hz capacitive reactance dominates the shunting impedance - esr can be ignored. because of the low led impedance the filter capacitors must reduce rms ripple voltage to about 1% of the led string voltage. equation 1 for this design, with (18) 3.2 v leds at 175 ma, the capacitance should be about 284 f. the value used was 330 f. !-v 'lrgh &xuuhqw 'lrgh9rowdjh /rz&xuuhqw g9 g,orz 9 9 9 g9 g,kljk 5dwhg&xuuhqw 6orsh 5hvlvwdqfh '\qdplf,pshgdqfh ri/('/rd g /('&kdu dfwhul vwlf&xu yh c 0.707 100 i led ?? 2 120hz v string ?? -------------------------------------------------------- =
design guidance AN4130 22/41 doc id 023315 rev 1 4.4 diode selection (d3) 4.4.1 speed d3 must be a fast-recovery part, but because of the transition-mode topology the recovery requirements are modest. current in the diode reverses slowly, and the diode is completely turned off well before the fet turns on. parts with trr up to about 70 ns are suitable. 4.4.2 reverse voltage the diode must support the reflected line voltage and output voltage plus a small spike from leakage inductance. a standard 200 v fast-recovery diode was used. a high-voltage schottky diode would also work, with a slight gain in efficiency and slightly increased cost. 4.4.3 current rating this is a low-stress application for the diode. the 1-amp rating of st?s stth102a is probably too much, but the part is inexpensive, and it works well. 4.5 snubber capacitor selection (c10) the current at fet turn-off continues to flow in the leakage inductance of the transformer, resulting in a primary-side voltage spike. common practice is to use an rcd clamp or an rc snubber to dissipate this energy as heat. the snubber can be moved to the secondary side of the transformer if leakage inductance is low. the primary voltage can be caught on-the-rise by an r-c network placed across the secondary winding or the diode. this avoids the need for high-voltage diodes and capacitors on the primary side. experiments with relatively low values of capacitor and resistor determined that for a narrow range of capacitor values the primary overshoot at fet turn-off was greatly reduced. it was also discovered that the resistor is not needed if the secondary side capacitor is properly selected. criteria for selection have not been determined. the 800 v rating of the hvled815pf's fet doesn't hurt either. it's certainly too much for a 120 v line. 4.6 transformer design (t1) 4.6.1 operating frequency higher operating frequency reduces the size of the transformer. operating frequency can be increased up to the point where emi filtering requirements become the limiting factor. an operating frequency just below 150 khz puts the second harmonic inside the conducted emi band, but the harmonics are smaller and easier to filter than the fundamental. placing the fundamental at 120-135 khz at the nominal line voltage peak is a good compromise, considering component tolerances.
AN4130 design guidance doc id 023315 rev 1 23/41 4.6.2 primary inductance assume the fet on-time takes up half the cycle time. equation 2 a value of 950 h was selected because additional time is required for the resonant drain voltage fall time of the transition-mode converter. 4.6.3 primary peak current this is set by the required output power, which is limited by i 2 r loss in the internal fet on- resistance, to about 10 w. for this design, at us mains voltage, the peak current is about 0.7 amps. 4.6.4 reflected voltage for pfc-flyback transition-mode power converters on us 120 v lines the best reflected voltage choice is 110 to 130 v. this range gives the best converter efficiency. copper losses can be spread more or less equally between the primary and secondary windings, and the fet turn-on losses from discharging circuit capacitance are quite low. a turns ratio of 2:1 primary: secondary was selected for the 18-led load, placing reflected voltage at about 112 v at full undimmed output. 4.6.5 leakag e inductance this should be as low as possible - energy stored here does not contribute to led power and must be dissipated as heat. using part of the primary winding as the secondary greatly reduces leakage inductance, but does not entirely eliminate it. 4.6.6 auxiliary winding turns ratio the operating voltage for the hvled815pf depends on the led voltage and the turns ratio. the led winding (secondary) voltage reflects to the flyback voltage on all windings. the turns ratio from the secondary to the auxiliary winding determines the auxiliary voltage, both for voltage regulation (open load protection) and for the vcc power supply. sufficient voltage must be available to power the hvled815pf at low dimmer settings. usually the lowest led voltage where light is visible is around 2.8 v. the reflected voltage on the auxiliary winding under these conditions must be greater than the hvled815pf's v ccoff max. 4.6.7 final transformer specification winding ratios, primary inductance, peak currents, and other specifications are shown on the schematic. the vendor's specification sheet appears later in this note.
design guidance AN4130 24/41 doc id 023315 rev 1 4.7 dmg pin (r6, r7) this single pin performs several functions; voltage limiting, zero current detection, and correction for line voltage changes. its operation is discussed thoroughly in the relevant datasheet and is only summarized here. the internal circuit is also used in st's hvled805 and altair chips. the datasheets and application notes for these parts offer additional insight into the pin operation. design begins with compensation for the internal comparator's propagation delay. at high line voltage the slope of fet current vs. time is higher, so for the same comparator reference voltage the current overshoots more than at low line. this is compensated by adding an offset proportional to line voltage to the comparator's reference input. r6, in conjunction with an internal resistor, rff, of about 45 , decreases the peak current trip point proportional to the line voltage. the values in the demo unit slightly overcompensate line voltage. the two resistors form a divider that normally sets the converter output voltage. the led driver uses constant-current mode - the constant-voltage circuit is used only for overvoltage protection, such as an open load situation. on the positive swing of the output and auxiliary windings the divided voltage is measured at the end of the transformer discharge time, and compared to an internal 2.5 v reference by a transconductance op amp. the vout setting should equal the output filter capacitor's voltage rating. the third function, zero current detection, uses the voltage at the dmg pin to measure the duty cycle of the output diode conduction period. this is used for the internal current regulator - the duty cycle measured here determines the fet cutoff current, indirectly controlling output current. the divider's resistor values have very little effect on this function. during product development, it is helpful to separate the functions. choose a value for r7 that sets the overvoltage protection level very high (2x expected), and adjust r6 to give the flattest current limit vs. line voltage characteristic. when the value for r6 is set, pick the value for r7 to give the correct overvoltage protection. 4.8 filter capacitor for vcc the dimming requirement sets a minimum size for this capacitor. during the dimmer's non- conducting period the line is not present for the internal startup circuit to take over, so the stored energy in this part is used to keep the chip alive. at low conduction angles the capacitor is barely topped off, and it must hold the vcc voltage above the shut-off threshold for a half cycle. at the same time, the leds are operating on very low current, and the reflected voltage is smaller than normal, and led dependent. the capacitor value therefore depends on the turns ratio of the auxiliary winding to the output winding, the led voltage at minimum conduction angle, and the shut-off threshold. a small 10 f low-voltage ceramic was tried, but the voltage coefficient of capacitance was so high the part did not work in the dimming mode. capacitance was too low to maintain power to the chip between dimmed line pulses. high-k ceramic capacitance falls off dramatically, well below the rated voltage. a 10 f electrolytic was then selected - it works well.
AN4130 design guidance doc id 023315 rev 1 25/41 4.9 comp pin capacitor because the hvled815pf is used only in current limit mode when driving leds, the usual loop stability compensation network is not needed. voltage limiting is used only when the led string is open (think of bench testing?) and the comp pin capacitor needs to be small so that overvoltage response is quick. 1 nanofarad is a good value. 4.10 current sense resistor this resistor value is determined by the average led current desired and turns ratio of the transformer, according to a formula, as follows: equation 3 where n is the transformer turns ratio, v cled the internal reference, and r sense the current sensing resistor. internally, v cled is 0.2 v. this is the ideal situation. in fact, because the transformer is not the ideal transformer, imperfect coupling makes the actual turns ratio less than the designed value. also the voltage feed-forward compensation and demagnetizing time further reduce the actual led current from the calculated number. typically, the coefficient k is around 0.85~0.9. therefore the formula to determine the resistor is: equation 4 for this demo board, with turns ratio of 2 and a 1.00 , 1% current sensing resistor, we get the led current around 180 ma. for different designs, tweaks may be needed, but once the final values are selected, repeatability from unit to unit is excellent. 4.11 ac injection divider (r3, r4) in the us, line current total harmonic distortion must be kept below 20% of the 60 hz fundamental. the input current is already distorted due to the use of a sinusoidal peak current envelope. input current harmonic distortion actually improves slightly when the line current goes to zero for a short time around the voltage zero crossing. the distortion minimum only occurs at one input voltage, increasing as the line voltage is moved away from that point. the average of the injected ac waveform (not the rms value) should be set approximately equal to the dc level required to give the correct current to the leds. at nominal line the average injected voltage is close to 0.95 v - the rms voltage is 1.111 times the average, or 1.05 v, peak voltage is about 1.45 v. again, tweaking may be necessary, but repeatability between units is excellent once the values are selected.
design guidance AN4130 26/41 doc id 023315 rev 1 there are two limits on the impedance of the network: loss in the divider (mostly the upper resistor), which affects efficiency impedance at the iled pin should be much lower than that of the internal duty cycle calculation circuitry. an upper divider resistance of 270 k keeps resistive loss low: equation 5 the efficiency reduction for this loss is 0.053 w/9.8 w = 0.54%. the impedance looking into the iled pin of the hvled815pf is approximately 1.5 v/ 10 a = 150 k. this varies with duty cycle - it is lower as the line voltage is increased. the injected voltage needed at the divider tap should be just sufficient enough to shut off the fet at the line zero crossing. the average of this voltage should therefore be equal to the average of an equivalent dc-input converter supplying the leds. the actual value of the lower resistor is determined experimentally to give the best compromise between high line and low line thd. with the 270 k upper divider resistor and the impedance of the iled pin in parallel, a 3 k resistor gives good results. thd is acceptable across the 90 v to 132 v voltage range. the divider values are not critical - 5% resistors are adequate. a small capacitor across the lower divider resistor smooths the current pulses from the duty cycle measurement circuitry and helps keep switching noise out of the system. this should be in the range of 10 nanofarads for the switching frequency used in the demo. 4.12 emi filter design in the us, conducted noise is measured between 150 khz and 30 mhz. low frequency noise is the most difficult to filter. the operating frequency was selected so that the fundamental is just below the measurement band, and the second harmonic frequency is as high as possible. the noise injected into the line can be broken into two components, differential mode and common mode. we consider only differential mode noise in this non-isolated design. good layout minimizes common-mode noise. conducted emission testing is done with a standard line impedance simulation network (lisn). a simplified diagram is shown below.
AN4130 design guidance doc id 023315 rev 1 27/41 figure 32. simplified lisn diagram differential impedance in the noise spectrum (150 khz to 30 mhz) is 100 line-to-line, 50 line-to-ground. we design for peak noise at the fcc limit at 150 khz. the design leaves some margin due to the frequency selection. peak-to-peak of the 2 mvrms limit is about 6 mv per line relative to ground. figure 33. conducted emi limits the typical differential filter consists of 4 components. starting at the noise source, these are: shunt capacitor on the converter input (c3) series inductor (l1) shunt capacitor across line (c2) line impedance (in the lisn, about 100 line-to-line at measurement frequencies). !-v (igh : (igh : , , ,).% .%542!, '2/5.$ # ,o w : # ,ow : /hms /hms '2/5.$ d"u6m62-3?!2-3 d"u6m62-3?!2-3 d "u6m62-3?!2-3 d "u6m62-3?!2-3 d"u6m62-3?!2-3 k(z k(z -(z -(z 1uasi peaklimitline !veragelimitline d"perdecade !-v
design guidance AN4130 28/41 doc id 023315 rev 1 4.12.1 supporting the flyback input current first we consider the differential current drawn by the converter. the input current waveform at line peak is sketched below: figure 34. flyback converter input current waveform the peak current is about 0.7 a, and the on-time is about 3.5 microseconds. the charge that must be delivered by the capacitor directly across the converter each cycle is about: equation 6 the capacitance needed was determined experimentally - 0.1 f is a good starting point at this power level. so, ripple voltage for the 0.1 f capacitor is about: equation 7 4.12.2 shunting the hf noise next we examine the input capacitor. we use 0.1 f here as well. values as small as 0.047 f can be made to work, but the inductor value must increase to keep the noise on the ac line low enough. the resulting inductors either become physically large, or the resistive loss in the winding affects efficiency. 4.12.3 limiting the noise current at 150 khz, the 0.1 f capacitor has a reactance of about 10 . this reactance shunts away 90% of the noise current from the lisn, leaving only about 10% to the input. so 12 vp-p must be reduced to about 12 mvp-p (half the noise appears on each line terminal relative to ground). the inductor must have a reactance of at least 1000 ohms at 150 khz. it was found experimentally that a 4.7 mhy part worked well. the selected inductor has about 5.5 w of dc resistance, so i2r loss is relatively low.
AN4130 design guidance doc id 023315 rev 1 29/41 4.13 emi filter and dimming 4.13.1 damping the input filter when the unit is dimmed a large transient voltage appears on the filter input capacitor: figure 35. undamped input filter waveforms with triac dimmer to maintain triac holding current, the ringing must be damped. the best way to do this is to add an r-c network across the filter output, where the network impedance is highest. ideally, the input current waveform should look like this: figure 36. properly damped waveforms actually, some high-frequency ringing can be tolerated, if the current reversal time is less than the turn-off time of the triac, about 20 microseconds. the input filter, however, would ring at about: equation 8 so current reversal time would be in the 70 microsecond range. damping is required. the filter?s output impedance is high, the impedance at the line end is low. in fact, the line end of the network is much less than the 100 of the lisn at the ringing frequency, almost
design guidance AN4130 30/41 doc id 023315 rev 1 insignificant for the damping function. so the ringing network primarily consists of the filter inductor and the converter input capacitor. the typical damping network across a current-sink load would consist of a capacitor and a resistor in series. the minimum capacitor value would be 3 times the filter capacitance (3x c1, use 0.33 f), and a resistor of: equation 9 however, power dissipation in the damping resistor can be a problem. if the dimmer is set to 90 degrees conduction, the input voltage comes on at the peak of the line waveform. the damping resistor must charge the damping capacitor 120 times a second to the peak line voltage. for each transient, the energy dissipated in the resistor is slightly less than: equation 10 other damping mechanisms exist, however, so the damping network does not need to be so large. reducing the size of the capacitor would allow the use of a 1/2 w resistor. the pfc-flyback converter, unlike a regulating converter, has a positive input resistance near the filter?s resonant frequency. the input current it draws increases when the line voltage increases, short term. this contributes some damping. the effective resistance can be calculated from line voltage and input power. input power is about 11 w. at nominal line the input resistance is: equation 11 note that this resistance rises and falls as the square of the line voltage. some additional damping is provided by the winding resistance of the inductors and the fusible resistor. it was found experimentally that the ringing could be completely damped with a series r-c network of 0.22 f and 390 .
AN4130 design guidance doc id 023315 rev 1 31/41 the final filter design is shown below: figure 37. final input filter design the actual transient input waveforms are shown below for different scales: figure 38. input transient at 200 ma/div, 2.5 ms/div figure 39. input transient at 500 ma/div, 500 s/div !-v !# 6 !# 6 "2 "2)$'% 3-4 2 /hm&usible # u&6 2 7 # u&6 # u&6 2 + , m(y 4o 0ower #onverter &rom !# ,i n e
design guidance AN4130 32/41 doc id 023315 rev 1 figure 40. input transient at 1 a/div, 50 s/div where: yellow = triac dimmed line voltage magenta = line current, scale below. the rather high current spike at the leading edge is due to the input capacitor charging through the fusible resistor. a small inductor may be added to soften this if space permits, but it does no harm. even if triac dimming is not required, the damper should be used. the emi filter can ring up the supply voltage to very high levels at turn-on if it is not present, and instability has been seen without the damper under normal operating conditions.
AN4130 bill of materials doc id 023315 rev 1 33/41 5 bill of materials table 2. bom designator comment description footprint manufacturer vendor br1 bridge smt 1 a dip bridge rh0x diodes inc rh06-t digi-key rh06dict-nd c2, c3 0.1 f 250 v capacitor boxsdlwh5- 0.5-8-6.3-11.2 panasonic ecq- e2104kb digi-key p10967-nd c4 0.22 f 250 v capacitor boxsdlwh7.5- 0.6-10.3-6-10.8 panasonic ecq- e2224kb digi-key p10971-nd c5 1 nf capacitor 0805 0805 x7r c6 4.7 f 25 v capacitor 0805 taiyo yuden tmk212bj475kg-t digi-key 587-1782-1-nd c7 10 nf capacitor 0805 0805 x7r c8 10 f 35 v capacitor cev5mmp nichicon upw1v100mdd6 digi-key 493-1850-nd c10 330 pf capacitor 1206 avx 12062a331jat2a digi-key 478-1433-6-nd c11 330 f 63 v capacitor ceh12dx20l panasonic eeu- fc1j331 digi-key p10349-nd d1 bat48zfilm schottky diode sod-123 st bat48zfilm d2 mmsd4148 signal diode 150-200 ma 100 v 4 ns sod-123 mmsd4148 d3 stth102a diode sma st stth102a l2 4.7 mhy inductor induc9mmver t wurth 744 772 472 or 744 745 2 472 digi-key 732-3790-nd or 732-3084-nd r1 10 fusible resistor resaxvert0.5w vishay/bc components nfr0100001009jr500 digi-key ppc10cct-nd r2 390 0.5 w resistor res0.5 vishay nfr25h0003900jr500 digi-key ppc390bct- nd r3 270 k resistor 1206 1206 5% r4 3.0 k resistor 0805 0805 5% r5 1r00 1% resistor 1206 1206 1% r6 22 k resistor 0805 0805 5% r7 2.4 k resistor 0805 0805 5% r8 10 k resistor 1206 1206 5% r9 43 k resistor 1206 1206 5%
bill of materials AN4130 34/41 doc id 023315 rev 1 t1 cramer csm 16vt-141 cramer csm2010 s- p dual sec cramer cvp11 cramer csm 16vt-141 u1 hvled815pf led driver pfc so-16 - no pad pin 12 st hvled815pf table 2. bom (continued) designator comment description footprint manufacturer vendor
AN4130 transformer specifications doc id 023315 rev 1 35/41 6 transformer specifications for 18 leds (matches bill of materials and performance report). figure 41. transformer specification for 18-led load !-v
extensions and modifications AN4130 36/41 doc id 023315 rev 1 7 extensions and modifications 7.1 lower output voltage, higher current components are listed below for a version to drive 9 leds at twice the current, 350 ma. some other changes must also be made to the secondary side: change snubber capacitor c10 to a high-quality part of four times the value, such as a 1200 pf cog ceramic rated for 200 v. change diode d3 to a 150 v schottky type such as st's stps1150 to reduce voltage drop. efficiency is reduced if this change is not made. change the output capacitor to one having 4 times the capacitance and half the voltage rating, 1000-1200 f at 35 v. this maintains the ripple current near the same percentage of led current as the original design. change the preload resistor to one having ? the original resistance. change the power transformer to cramer csm 16vt-140 (specification below). this transformer has the primary tap ? of the way down from the positive rail, giving half the turns ratio of the csm 16vt-141. there are no changes needed on the primary side. the transformer specification for the 9-led design is shown in figure 42 .
AN4130 extensions and modifications doc id 023315 rev 1 37/41 figure 42. transformer specification for 9-led load 7.2 higher line voltage this is almost a wide-range design, dimmable at 90 v-130 v, and operable from 90 v to 305 v. the only thing preventing this is the voltage rating of capacitors and the output diode. the hvled815pf?s internal fet is rated for 800 v, a good design margin for european 230 v lines and us 277 v lighting circuits. the design is not sensitive to input frequency. ac injection divider (r3-r4) is adjusted, reasonable harmonic distortion (thd) performance can be expected from 180 v to 305 v. at higher input voltage the surge limiting resistor r1 should be coordinated with the single- cycle surge rating of the input bridge. triac dimming at higher input voltage requires redesign of the input filter. !-v
pc layout AN4130 38/41 doc id 023315 rev 1 8 pc layout figure 43. top placement figure 44. top copper figure 45. bottom placement figure 46. bottom layer !-v !-v
AN4130 references doc id 023315 rev 1 39/41 9 references 1. altair05t-800, ?off-line all-primary-sensing switching regulator?, rev 1, datasheet. 2. db1534 evlaltair05t-5w, ?altair05t-800 5 w wide range cv-cc optoless adapter demonstration board?, rev 1, data brief. 3. hvled805, ?off-line led driver with primary-sensing?, rev 1, datasheet. 4. an3360, ?3.2 w led power supply based on hvled805?, rev 2, application note. 5. hvled815pf, ?off-line led driver with primary-sensing?, rev 1, datasheet. 6. us patent 5,729,443 ?switched current regulator with improved power switch control mechanism? pavlin (1998) 7. us patent 7,978,485 ?thyristor power control circuit with damping circuit maintaining thyristor holding current? stamm et al. (2011) 8. an1059, ?design equations of high-power-factor flyback converters based on the l6561?, rev 1, application note 9. an2711, ?120 vac input-triac dimmable led driver based on the l6562a?, rev 3, application note 10. an2838, ?35 w wide-range high power factor flyback converter demonstration board using the l6562a?, rev 1, application note 11. an4129, ?9w triac dimmable, high power factor, isolated led driver based on hvled815pf (for us market)?, rev 1, application note.
revision history AN4130 40/41 doc id 023315 rev 1 10 revision history table 3. document revision history date revision changes 03-sep-2012 1 initial release.
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